Sponsored By:
Technical Sponsored By:
Joint IEEE Chapter of Solid-State Circuits and Electron Devices (SSC & ED) Societies, Gujarat Section
'KARYASHALA' is a noble endeavor of Government of India by Science and Engineering Board (SERB) under Accelerate Vigyan Scheme to improve research productivity of promising PG and PhD students from universities and colleges through high-end workshops on specific themes. This program aims to provide opportunities to acquire specialized research skills. These workshops will primarily be facilitated at organizations / institutions / laboratories of national importance. DA-IICT Gandhinagar has decided to be a part of this unique initiative and share our Institutional resources with the society towards higher goals of national importance. Thus, the current workshop has come into being. This event is sponsored by SERB.
Joint IEEE Chapter of Solid-State Circuits and Electron Devices (SSC & ED) Societies, Gujarat Section
The current high-end workshop can be highly beneficial to students and researchers working in the area of Image Processing, Hardware Implementation, VLSI Architectures and Systems, MATLAB/Python, HDL – Verilog, FPGA. The workshop aims to provide opportunities to acquire specialized research skills and hands-on-training
Basics of VLSI design and architectures.
Basics of Image processing and algorithms.
Role of VLSI in Image Processing – circuit and architecture design for matric multiplication and other operators in image processing.
Image Processing applications: Image Enhancement, Image Restoration, Image Segmentation, Object Detection for remote sensing, satellite imaging and weather forecasting.
Provide hands on training using MATLAB/Python simulation environment and its hardware execution using Verilog and FPGA.
The course faculty includes resource persons from IITs, NITs, IIITs, reputed institutes and industries.
Workshop is open to postgraduate students/research scholars from all Institutes and universities.
Preference will be given to the students having interest towards VLSI, Embedded Systems,
Computer Architecture, Image/video/signal Processing, HDL – Verilog, FPGA implementation
and related domains.
Total number of seats is limited to 25. The participants will be selected
based on their academic/research credentials and first-come-first-serve basis.
The selected applicants will be provided free accommodation and fooding at DA-IICT.
Also, the traveling expenses (3 AC) will be reimbursed.
With the tag of the cleanest city in Asia, Gandhinagar is the administrative capital of the state of Gujarat, located on the western bank of Sabarmati river. Named after the father of Nation, Mahatma Gandhi, Gandhinagar is the second planned city of India, after Chandigarh. The city is divided into thirty organised sectors, each of them is pedestrian friendly and self-contained. It's more of a people-oriented city, with all the parks, monuments, gardens and grand civic buildings. During Rainy season, i.e., when the workshop is scheduled, it is pleasant climate with temperature ranging between 25 to 35 °C. It is advisable to bring umbrella with you.
Explore Gandhinagar